This invention relates to semiconductor devices and, more specifically, relates to a novel device in which a plurality of die, which may be of diverse size and of diverse junction pattern, are fixed to a common lead frame and within a common package or housing and are interconnected with reduced inductance.
When MOSFETs, or other MOS gated semiconductor devices, are used in switching applications in which the gate of the device is repeatedly turned on and off, transient currents can flow through the body diode of the device when the device is turned off, increasing the turnoff time of the device. It is therefore advantageous to place a Schottky diode in parallel with and oriented in the direction of the body diode to provide a faster path for the flow of transient currents. The Schottky thus prevents the body diode from conducting because the Schottky generally has a lower forward voltage drop than the body diode. Typically, the Schottky has a forward voltage drop of about 0.4 V, whereas the body diode typically has a forward voltage drop of 0.7 V.
Other electrical circuits, such as DC to DC converters, synchronous converters, and the like also require a number of semiconductor components such as MOS gated semiconductor devices and Schottky diodes. The MOS gated device and the Schottky diode are generally separately housed and individually mounted on a support board. The separately housed parts therefore take up board space and, as each part generates heat, can interfere with other nearby mounted components, such as microprocessors. It is thus desirable to reduce the board space and the part count and assembly cost by mounting the MOS gated device and the Schottky diode on a common lead frame. In this arrangement, each of the devices has a first power terminal that is electrically connected to the main pad area of the lead frame which has an externally available pin to connect to the main pad area. The die are also provided with one or more additional power terminals at the top of each die which are connected to respective external pins of the lead frame and which are isolated from one another. Such a device is disclosed in U.S. application Ser. No. 08/816,829, filed on Mar. 18, 1997 now U.S. Pat. No. 5,814,884, which is incorporated herein by reference.
When the MOSFET and the Schottky diode are mounted in a commonly housed lead frame as described above, the drain terminal of the MOSFET and the cathode terminal of the Schottky diode typically contact the main pad area. In a T0220 package, for example, the main pad area is integral with the central pin, and a bonding wire connects the gate terminal atop the MOSFET to another of the pins. Additional bonding wires connect the MOSFET source pad area and the Schottky diode anode pad to a third external pin.
This arrangement results in an undesired inductance in the lead that connects the anode of the Schottky to the source pin of the device and which increases the time required for the transient currents to die down, thereby causing switching losses.
It is therefore desirable to provide a co-packaged device without this inductance.